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SN74LVC1T45DBVR / Translation - Voltage Levels SingleB Dual-Supply Bus Trans
| Product Attribute | Attribute Value |
|---|---|
| Texas Instruments | |
| Product Category: | Translation - Voltage Levels |
| RoHS: | Details |
| SN74LVC1T45 | |
| Bus Transceiver | |
| SMD/SMT | |
| SOT-23-6 | |
| 1.65 V | |
| 5.5 V | |
| - 40 C | |
| + 85 C | |
| 17.7 ns | |
| Reel | |
| Cut Tape | |
| MouseReel | |
| Brand: | Texas Instruments |
| Features: | Partial power down (Ioff), Over-voltage tolerant inputs, Vcc isolation |
| High Level Output Current: | - 32 mA |
| Input Type: | CMOS, TTL |
| Logic Family: | LVC |
| Low Level Output Current: | 32 mA |
| Operating Temperature Range: | - 40 C to + 85 C |
| Output Type: | 3-State |
| Product Type: | Translation - Voltage Levels |
| Factory Pack Quantity: | 3000 |
| Subcategory: | Logic ICs |
| Unit Weight: | 0.000229 oz |
DESCRIPTION
This single-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5- V, 3.3-V, and 5-V voltage nodes.
The SN74LVC1T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated. The input circuitry is always active on both A and B ports and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.
The SN74LVC1T45 is designed so that the DIR input is powered by VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature is designed so that if either VCC input is at GND, then both ports are in the high-impedance state.
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